General Practices
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Start from the simplest block diagram and simplest circuit for each block. Any additions should have tracking comments. For example if starting from a simple folded cascode opamp if you change the output stage to push pull then write the reason why that was done.
Quantify everything during design. Example if a non overlapping clock circuit is added then how much non overlap does it provide (max/min). If a level shifter was added how much difference between the rails is there (max/min) and so on.
Carefully choose devices always keeping in mind whatever satisfies your purpose with minimum area and complexity is the best solution. Like if BJTs occupy a large area then maybe using a MOS and reducing the accuracy might be good enough for an application. To calculate if its good enough you will go though many rough calculations that would get the calculations and numbers set in your mind for the Design Review also.
For any sense pin or inputs on a chip make sure to create Kelvin contacts to the sense point.

Noisy Signals
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Always have a clear understanding of which signals are sensitive and should be shielded from noisy signals and which signals are noisy.

For chips that would run into high temperatures always be concerned about leakages in junctions and question any small biasing currents that may be overwhelmed by leakages.

Have a clear algorithm for Startup and Shutdown sequencing of blocks in an IC.
Analyse each block in Power down state and check for any high impedance uninitialized nodes
Check if power up latch initialization is in proper state for any latches present.

Simulate each block to the point it fails. This is required to understand how much margin we have.

Having a good set of spares available is always useful for fixing errors later.
Anywhere there is logic circuitry be sure to throw in some NAND/NOR and inverters there to have logic changes possible since logic always needs to be changed.