Mentioned below are all the points that should be carefully considered and added in the Layout Notes for a schematic:
- Identify High Current Density Nodes and mark the minimum metal width.
- Identify Sensitive nodes and mark them for shielding.
- Identify and mark the devices that require latchup protection
- Identify and mark an unusual metal requirements like metal width, type, spacing or number of vias.
- Mark Matched devices and elaborate on the placement eg. cross couple, common centroid, dummy devices, etc.
- Probe Point locations.
- Identify all well and substrate connections and mark them for PDKs not doing this automatically.